From 4db633c0eff22df20dd5f682ebc4e0d698bd5666 Mon Sep 17 00:00:00 2001 Message-Id: <4db633c0eff22df20dd5f682ebc4e0d698bd5666.1350899902.git.minovotn@redhat.com> In-Reply-To: <3e77d4faf00d4821ff5c0d16f18f5abfc222f3e0.1350899902.git.minovotn@redhat.com> References: <3e77d4faf00d4821ff5c0d16f18f5abfc222f3e0.1350899902.git.minovotn@redhat.com> From: "Michael S. Tsirkin" Date: Thu, 18 Oct 2012 15:17:41 +0200 Subject: [PATCH 2/4] pci: interrupt pin documentation update RH-Author: Michael S. Tsirkin Message-id: <81217637bc749f6c96121fe8c1daeda203513b28.1350572959.git.mst@redhat.com> Patchwork-id: 43358 O-Subject: [PATCHv2 RHEL6.4 qemu-kvm 2/3] pci: interrupt pin documentation update Bugzilla: 866736 RH-Acked-by: Jason Baron RH-Acked-by: Xiao Wang RH-Acked-by: Stefan Hajnoczi Fix up some erroneous comments in code: interrupt pins are named A-D, the interrupt pin register is always readonly and isn't zeroed out on reset. Signed-off-by: Michael S. Tsirkin (cherry-picked from commit 817e0b6fe8324de8dbd4bec9184c207754618365) --- hw/e1000.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) Signed-off-by: Michal Novotny --- hw/e1000.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/e1000.c b/hw/e1000.c index e61bed6..d104762 100644 --- a/hw/e1000.c +++ b/hw/e1000.c @@ -1227,8 +1227,7 @@ static int pci_e1000_init(PCIDevice *pci_dev) /* TODO: RST# value should be 0, PCI spec 6.2.4 */ pci_conf[PCI_CACHE_LINE_SIZE] = 0x10; - /* TODO: RST# value should be 0 if programmable, PCI spec 6.2.4 */ - pci_conf[PCI_INTERRUPT_PIN] = 1; // interrupt pin 0 + pci_conf[PCI_INTERRUPT_PIN] = 1; /* interrupt pin A */ d->mmio_index = cpu_register_io_memory(e1000_mmio_read, e1000_mmio_write, d); -- 1.7.11.7