* TM test $Id$
sysclear
archmode esame
r 1a0=00000001800000000000000000000200 # z/Arch restart PSW
r 1d0=00000001800000000000000000000280 # z/Arch pgm new PSW
r 200=E54C03280000 # MVHI COUNT,0      Clear error counter
r 206=41000008     # LA R0,8           R0=Number of test data
r 20A=41100800     # LA R1,TEST1       R1=>Test data table
r 20E=41F00900     # LA R15,RES1       R15=>Result table
r 212=1B88         # SR R8,R8          Clear CC register
r 214=43401000     #A IC R4,0(,R1)     Load R4=mask
r 218=41501001     # LA R5,1(,R1)      R5 => byte to test
r 21C=44400320     # EX R4,XTM         Execute TM instruction
r 220=B2220080     # IPM R8            R8=Cond code and pgm mask
r 224=5080F000     # ST R8,0(,R15)     Store CC in table
r 228=41F0F004     # LA R15,4(,R15)    R15=>next result table
r 22C=41101004     # LA R1,4(,R1)      R1=>Next TESTn
r 230=46000214     # BCT R0,A          Loop to end of TEST table
r 234=41000900     # LA R0,RES1        R0->Actual results
r 238=41100020     # LA R1,4*8         R1=Length of results table
r 23C=41200C00     # LA R2,EXP1        R2->Expected results
r 240=1831         # LR R3,R1          R3=Length of results table
r 242=0F02         # CLCL R0,R2        Compare with expected results
r 244=477002FC     # BNE DIE           Error if not equal
r 248=B2B20300     # LPSWE WAITPSW     Load enabled wait PSW
r 2FC=B2B20310     #DIE LPSWE DISWAIT  Load disabled wait PSW
r 300=07020001800000000000000000AAAAAA # WAITPSW Enabled wait state PSW
r 310=00020001800000000000000000BADBAD # DISWAIT Disabled wait state PSW
r 320=91005000     #XTM TM 0(R5),*-*   Executed instruction
r 328=00000000     #COUNT              Error counter
* Test data
r 800=900E0000                         # TEST1
r 804=880E0000                         # TEST2
r 808=0E0E0000                         # TEST3
r 80C=000E0000                         # TEST4
r 810=00000000                         # TEST5
r 814=FF000000                         # TEST6
r 818=7FFF0000                         # TEST7
r 81C=A55A0000                         # TEST8
* Expected condition codes
r C00=00000000                         # EXP1 CC=0
r C04=10000000                         # EXP2 CC=1
r C08=30000000                         # EXP3 CC=3
r C0C=00000000                         # EXP4 CC=0
r C10=00000000                         # EXP5 CC=0
r C14=00000000                         # EXP6 CC=0
r C18=30000000                         # EXP7 CC=3
r C1C=00000000                         # EXP8 CC=0
pgmtrace +7
restart
pause 1
* Display test data
r 800.20
* Display expected results
r C00.20
* Display actual results
r 900.20
