/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|*                                                                            *|
|* Register Information Header Fragment                                       *|
|*                                                                            *|
|* Automatically generated file, do not edit!                                 *|
|*                                                                            *|
\*===----------------------------------------------------------------------===*/

#include "llvm/CodeGen/TargetRegisterInfo.h"

namespace llvm {

class ARMFrameLowering;

struct ARMGenRegisterInfo : public TargetRegisterInfo {
  explicit ARMGenRegisterInfo(unsigned RA, unsigned D = 0, unsigned E = 0,
      unsigned PC = 0, unsigned HwMode = 0);
  unsigned composeSubRegIndicesImpl(unsigned, unsigned) const override;
  unsigned reverseComposeSubRegIndicesImpl(unsigned, unsigned) const override;
  LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
  LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
  const TargetRegisterClass *getSubClassWithSubReg(const TargetRegisterClass *, unsigned) const override;
  const TargetRegisterClass *getSubRegisterClass(const TargetRegisterClass *, unsigned) const override;
  const RegClassWeight &getRegClassWeight(const TargetRegisterClass *RC) const override;
  unsigned getRegUnitWeight(MCRegUnit RegUnit) const override;
  unsigned getNumRegPressureSets() const override;
  const char *getRegPressureSetName(unsigned Idx) const override;
  unsigned getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const override;
  const int *getRegClassPressureSets(const TargetRegisterClass *RC) const override;
  const int *getRegUnitPressureSets(MCRegUnit RegUnit) const override;
  ArrayRef<const char *> getRegMaskNames() const override;
  ArrayRef<const uint32_t *> getRegMasks() const override;
  bool isGeneralPurposeRegister(const MachineFunction &, MCRegister) const override;
  bool isGeneralPurposeRegisterClass(const TargetRegisterClass *RC) const override;
  bool isFixedRegister(const MachineFunction &, MCRegister) const override;
  bool isArgumentRegister(const MachineFunction &, MCRegister) const override;
  bool isConstantPhysReg(MCRegister PhysReg) const override final;
  /// Devirtualized TargetFrameLowering.
  static const ARMFrameLowering *getFrameLowering(
      const MachineFunction &MF);
};

namespace ARM { // Register classes
  extern const TargetRegisterClass HPRRegClass;
  extern const TargetRegisterClass FPWithVPRRegClass;
  extern const TargetRegisterClass SPRRegClass;
  extern const TargetRegisterClass FPWithVPR_with_ssub_0RegClass;
  extern const TargetRegisterClass GPRRegClass;
  extern const TargetRegisterClass GPRwithAPSRRegClass;
  extern const TargetRegisterClass GPRwithZRRegClass;
  extern const TargetRegisterClass SPR_8RegClass;
  extern const TargetRegisterClass GPRnopcRegClass;
  extern const TargetRegisterClass GPRnospRegClass;
  extern const TargetRegisterClass GPRwithAPSR_NZCVnospRegClass;
  extern const TargetRegisterClass GPRwithAPSRnospRegClass;
  extern const TargetRegisterClass GPRwithZRnospRegClass;
  extern const TargetRegisterClass GPRnoipRegClass;
  extern const TargetRegisterClass rGPRRegClass;
  extern const TargetRegisterClass GPRnoip_and_GPRnopcRegClass;
  extern const TargetRegisterClass GPRnoip_and_GPRnospRegClass;
  extern const TargetRegisterClass GPRnoip_and_GPRwithAPSR_NZCVnospRegClass;
  extern const TargetRegisterClass tGPRwithpcRegClass;
  extern const TargetRegisterClass FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClass;
  extern const TargetRegisterClass hGPRRegClass;
  extern const TargetRegisterClass tGPRRegClass;
  extern const TargetRegisterClass tGPREvenRegClass;
  extern const TargetRegisterClass GPRnopc_and_hGPRRegClass;
  extern const TargetRegisterClass GPRnosp_and_hGPRRegClass;
  extern const TargetRegisterClass GPRnoip_and_hGPRRegClass;
  extern const TargetRegisterClass GPRnoip_and_tGPREvenRegClass;
  extern const TargetRegisterClass GPRnosp_and_GPRnopc_and_hGPRRegClass;
  extern const TargetRegisterClass tGPROddRegClass;
  extern const TargetRegisterClass GPRnopc_and_GPRnoip_and_hGPRRegClass;
  extern const TargetRegisterClass GPRnosp_and_GPRnoip_and_hGPRRegClass;
  extern const TargetRegisterClass tcGPRRegClass;
  extern const TargetRegisterClass GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClass;
  extern const TargetRegisterClass hGPR_and_tGPREvenRegClass;
  extern const TargetRegisterClass tGPR_and_tGPREvenRegClass;
  extern const TargetRegisterClass tGPR_and_tGPROddRegClass;
  extern const TargetRegisterClass tcGPRnotr12RegClass;
  extern const TargetRegisterClass tGPREven_and_tcGPRRegClass;
  extern const TargetRegisterClass FP_STATUS_REGSRegClass;
  extern const TargetRegisterClass hGPR_and_GPRnoip_and_tGPREvenRegClass;
  extern const TargetRegisterClass hGPR_and_tGPROddRegClass;
  extern const TargetRegisterClass tGPREven_and_tcGPRnotr12RegClass;
  extern const TargetRegisterClass tGPROdd_and_tcGPRRegClass;
  extern const TargetRegisterClass CCRRegClass;
  extern const TargetRegisterClass FPCXTRegsRegClass;
  extern const TargetRegisterClass GPRlrRegClass;
  extern const TargetRegisterClass GPRspRegClass;
  extern const TargetRegisterClass VCCRRegClass;
  extern const TargetRegisterClass cl_FPSCR_NZCVRegClass;
  extern const TargetRegisterClass hGPR_and_tGPRwithpcRegClass;
  extern const TargetRegisterClass hGPR_and_tcGPRRegClass;
  extern const TargetRegisterClass DPRRegClass;
  extern const TargetRegisterClass DPR_VFP2RegClass;
  extern const TargetRegisterClass DPR_8RegClass;
  extern const TargetRegisterClass GPRPairRegClass;
  extern const TargetRegisterClass GPRPairnospRegClass;
  extern const TargetRegisterClass GPRPair_with_gsub_0_in_tGPRRegClass;
  extern const TargetRegisterClass GPRPair_with_gsub_0_in_hGPRRegClass;
  extern const TargetRegisterClass GPRPair_with_gsub_0_in_tcGPRRegClass;
  extern const TargetRegisterClass GPRPair_with_gsub_0_in_tcGPRnotr12RegClass;
  extern const TargetRegisterClass GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRRegClass;
  extern const TargetRegisterClass GPRPair_with_gsub_1_in_GPRspRegClass;
  extern const TargetRegisterClass DPairSpcRegClass;
  extern const TargetRegisterClass DPairSpc_with_ssub_0RegClass;
  extern const TargetRegisterClass DPairSpc_with_ssub_4RegClass;
  extern const TargetRegisterClass DPairSpc_with_dsub_0_in_DPR_8RegClass;
  extern const TargetRegisterClass DPairSpc_with_dsub_2_in_DPR_8RegClass;
  extern const TargetRegisterClass DPairRegClass;
  extern const TargetRegisterClass DPair_with_ssub_0RegClass;
  extern const TargetRegisterClass QPRRegClass;
  extern const TargetRegisterClass DPair_with_ssub_2RegClass;
  extern const TargetRegisterClass DPair_with_dsub_0_in_DPR_8RegClass;
  extern const TargetRegisterClass MQPRRegClass;
  extern const TargetRegisterClass QPR_VFP2RegClass;
  extern const TargetRegisterClass DPair_with_dsub_1_in_DPR_8RegClass;
  extern const TargetRegisterClass QPR_8RegClass;
  extern const TargetRegisterClass DTripleRegClass;
  extern const TargetRegisterClass DTripleSpcRegClass;
  extern const TargetRegisterClass DTripleSpc_with_ssub_0RegClass;
  extern const TargetRegisterClass DTriple_with_ssub_0RegClass;
  extern const TargetRegisterClass DTriple_with_qsub_0_in_QPRRegClass;
  extern const TargetRegisterClass DTriple_with_ssub_2RegClass;
  extern const TargetRegisterClass DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass;
  extern const TargetRegisterClass DTripleSpc_with_ssub_4RegClass;
  extern const TargetRegisterClass DTriple_with_ssub_4RegClass;
  extern const TargetRegisterClass DTripleSpc_with_ssub_8RegClass;
  extern const TargetRegisterClass DTripleSpc_with_dsub_0_in_DPR_8RegClass;
  extern const TargetRegisterClass DTriple_with_dsub_0_in_DPR_8RegClass;
  extern const TargetRegisterClass DTriple_with_qsub_0_in_MQPRRegClass;
  extern const TargetRegisterClass DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass;
  extern const TargetRegisterClass DTriple_with_dsub_1_in_DPR_8RegClass;
  extern const TargetRegisterClass DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass;
  extern const TargetRegisterClass DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClass;
  extern const TargetRegisterClass DTripleSpc_with_dsub_2_in_DPR_8RegClass;
  extern const TargetRegisterClass DTriple_with_dsub_2_in_DPR_8RegClass;
  extern const TargetRegisterClass DTripleSpc_with_dsub_4_in_DPR_8RegClass;
  extern const TargetRegisterClass DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass;
  extern const TargetRegisterClass DTriple_with_qsub_0_in_QPR_8RegClass;
  extern const TargetRegisterClass DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8RegClass;
  extern const TargetRegisterClass DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass;
  extern const TargetRegisterClass DQuadSpcRegClass;
  extern const TargetRegisterClass DQuadSpc_with_ssub_0RegClass;
  extern const TargetRegisterClass DQuadSpc_with_ssub_4RegClass;
  extern const TargetRegisterClass DQuadSpc_with_ssub_8RegClass;
  extern const TargetRegisterClass DQuadSpc_with_dsub_0_in_DPR_8RegClass;
  extern const TargetRegisterClass DQuadSpc_with_dsub_2_in_DPR_8RegClass;
  extern const TargetRegisterClass DQuadSpc_with_dsub_4_in_DPR_8RegClass;
  extern const TargetRegisterClass DQuadRegClass;
  extern const TargetRegisterClass DQuad_with_ssub_0RegClass;
  extern const TargetRegisterClass DQuad_with_ssub_2RegClass;
  extern const TargetRegisterClass QQPRRegClass;
  extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass;
  extern const TargetRegisterClass DQuad_with_ssub_4RegClass;
  extern const TargetRegisterClass DQuad_with_ssub_6RegClass;
  extern const TargetRegisterClass DQuad_with_dsub_0_in_DPR_8RegClass;
  extern const TargetRegisterClass DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass;
  extern const TargetRegisterClass QQPR_with_ssub_0RegClass;
  extern const TargetRegisterClass DQuad_with_dsub_1_in_DPR_8RegClass;
  extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass;
  extern const TargetRegisterClass MQQPRRegClass;
  extern const TargetRegisterClass DQuad_with_dsub_2_in_DPR_8RegClass;
  extern const TargetRegisterClass DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass;
  extern const TargetRegisterClass DQuad_with_dsub_3_in_DPR_8RegClass;
  extern const TargetRegisterClass DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass;
  extern const TargetRegisterClass MQQPR_with_qsub_0_in_QPR_8RegClass;
  extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass;
  extern const TargetRegisterClass MQQPR_with_dsub_2_in_DPR_8RegClass;
  extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8RegClass;
  extern const TargetRegisterClass QQQQPRRegClass;
  extern const TargetRegisterClass QQQQPR_with_ssub_0RegClass;
  extern const TargetRegisterClass QQQQPR_with_ssub_4RegClass;
  extern const TargetRegisterClass QQQQPR_with_ssub_8RegClass;
  extern const TargetRegisterClass MQQQQPRRegClass;
  extern const TargetRegisterClass MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8RegClass;
  extern const TargetRegisterClass MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8RegClass;
  extern const TargetRegisterClass MQQQQPR_with_qsub_2_in_QPR_8RegClass;
  extern const TargetRegisterClass MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8RegClass;
} // end namespace ARM

} // end namespace llvm

