# -*- coding: utf-8; mode: tcl; tab-width: 4; indent-tabs-mode: nil; c-basic-offset: 4 -*- vim:fenc=utf-8:ft=tcl:et:sw=4:ts=4:sts=4 PortSystem 1.0 PortGroup github 1.0 github.setup steveicarus iverilog 11_0 v version [string map {_ .} ${github.version}] revision 0 set major [lindex [split ${version} .] 0] categories science license GPL-2+ platforms darwin maintainers {keeh.net:paf @padf} openmaintainer description Icarus Verilog long_description Icarus Verilog is a Verilog simulation and synthesis tool. \ It operates as a compiler, compiling source code writen in \ Verilog (IEEE-1364) into some target format. For batch \ simulation, the compiler can generate C++ code that is \ compiled and linked with a run time library (called \ \"vvm\") then executed as a command to run the simulation. \ For synthesis, the compiler generates netlists in the \ desired format. homepage http://iverilog.icarus.com/ master_sites ftp://ftp.icarus.com/pub/eda/verilog/v${major}/ distname verilog-${version} checksums rmd160 d5ce7247745c2d047d51e7f9f125d8a97fca946c \ sha256 d54785616b63fe6739948e9967499624f29ded54adb57e1e00eb897567a655d5 \ size 1784307 depends_lib-append port:bzip2 \ port:readline \ port:zlib depends_build port:bison compiler.cxx_standard 2011 if {[string match *clang* ${configure.cxx}] && ${configure.cxx_stdlib} ne ""} { configure.ldflags-append -stdlib=${configure.cxx_stdlib} } test.run yes test.target check destroot.destdir prefix=${destroot}${prefix} post-destroot { set docdir ${destroot}${prefix}/share/doc/${name} xinstall -d ${docdir} copy ${worksrcpath}/examples ${docdir} xinstall -m 644 {*}[glob ${worksrcpath}/*.txt] ${docdir} xinstall -d ${docdir}/vvp xinstall -m 644 {*}[glob ${worksrcpath}/vvp/*.txt] ${docdir}/vvp xinstall -m 644 -W ${worksrcpath} cadpli/cadpli.txt ivlpp/ivlpp.txt \ ${docdir} } # g++-4.2: -E, -S, -save-temps and -M options are not allowed with multiple -arch flags universal_variant no