--- gcc-4.0.4/gcc/config/rs6000/darwin-fallback.c.orig	2007-11-11 10:46:12.000000000 +0900
+++ gcc-4.0.4/gcc/config/rs6000/darwin-fallback.c	2007-11-11 11:25:18.000000000 +0900
@@ -261,9 +261,9 @@
 };
 
 #define UC_FLAVOR_SIZE \
-  (sizeof (struct mcontext) - sizeof (ppc_vector_state_t))
+  (sizeof (struct __darwin_mcontext) - sizeof (ppc_vector_state_t))
 
-#define UC_FLAVOR_VEC_SIZE (sizeof (struct mcontext))
+#define UC_FLAVOR_VEC_SIZE (sizeof (struct __darwin_mcontext))
 
 #define UC_FLAVOR64_SIZE \
   (sizeof (struct gcc_mcontext64) - sizeof (ppc_vector_state_t))
@@ -354,33 +354,33 @@
     }
   else
     {
-      struct mcontext *m = uctx->uc_mcontext;
+      struct __darwin_mcontext *m = (struct __darwin_mcontext *)uctx->uc_mcontext;
       int i;
 
-      float_state = &m->fs;
-      vector_state = &m->vs;
+      float_state = &m->__fs;
+      vector_state = &m->__vs;
       
-      new_cfa = m->ss.r1;
+      new_cfa = m->__ss.__r1;
 
-      set_offset (CR2_REGNO, &m->ss.cr);
+      set_offset (CR2_REGNO, &m->__ss.__cr);
       for (i = 0; i < 32; i++)
-	set_offset (i, &m->ss.r0 + i);
-      set_offset (XER_REGNO, &m->ss.xer);
-      set_offset (LINK_REGISTER_REGNUM, &m->ss.lr);
-      set_offset (COUNT_REGISTER_REGNUM, &m->ss.ctr);
+	set_offset (i, &m->__ss.__r0 + i);
+      set_offset (XER_REGNO, &m->__ss.__xer);
+      set_offset (LINK_REGISTER_REGNUM, &m->__ss.__lr);
+      set_offset (COUNT_REGISTER_REGNUM, &m->__ss.__ctr);
 
       if (is_vector)
-	set_offset (VRSAVE_REGNO, &m->ss.vrsave);
+	set_offset (VRSAVE_REGNO, &m->__ss.__vrsave);
 
       /* Sometimes, srr0 points to the instruction that caused the exception,
 	 and sometimes to the next instruction to be executed; we want
 	 the latter.  */
-      if (m->es.exception == 3 || m->es.exception == 4
-	  || m->es.exception == 6
-	  || (m->es.exception == 7 && !(m->ss.srr1 & 0x10000)))
-	return_addr = m->ss.srr0 + 4;
+      if (m->__es.__exception == 3 || m->__es.__exception == 4
+	  || m->__es.__exception == 6
+	  || (m->__es.__exception == 7 && !(m->__ss.__srr1 & 0x10000)))
+	return_addr = m->__ss.__srr0 + 4;
       else
-	return_addr = m->ss.srr0;
+	return_addr = m->__ss.__srr0;
     }
 
   fs->cfa_how = CFA_REG_OFFSET;
@@ -399,14 +399,14 @@
   set_offset (ARG_POINTER_REGNUM, &return_addr);
 
   for (i = 0; i < 32; i++)
-    set_offset (32 + i, float_state->fpregs + i);
-  set_offset (SPEFSCR_REGNO, &float_state->fpscr);
+    set_offset (32 + i, float_state->__fpregs + i);
+  set_offset (SPEFSCR_REGNO, &float_state->__fpscr);
   
   if (is_vector)
     {
       for (i = 0; i < 32; i++)
-	set_offset (FIRST_ALTIVEC_REGNO + i, vector_state->save_vr + i);
-      set_offset (VSCR_REGNO, vector_state->save_vscr);
+	set_offset (FIRST_ALTIVEC_REGNO + i, vector_state->__save_vr + i);
+      set_offset (VSCR_REGNO, vector_state->__save_vscr);
     }
 
   return true;