module Logic_builtin_used: sig .. end
sig
end
val add : string -> Cil_types.logic_info list -> unit
string -> Cil_types.logic_info list -> unit
val mem : string -> bool
string -> bool
val iter : (string -> Cil_types.logic_info list -> unit) -> unit
(string -> Cil_types.logic_info list -> unit) -> unit
val self : State.t
State.t